HomeQuery OptimizerBenchmarksServer Systems, ProcessorsStorage ScriptsExecStats

2018

 Too Much Memory (2018 Sep, preliminary)

 RISC vs. CISC (2018 Aug)

 Multi-Processors Must Die (2018 Aug)

 Intel 10nm Delay Assessment (2018-08)

2018 Q1/2

 Memory Latency (2018-04)

 TPC-E Benchmarks (2018-04)

 DRAM (Updated 2018-10),   original  DRAM (2018-03)

 SRAM as Main Memory (2018-03)

System Architecture Review
 Front-side Bus

 System Architecture Review 2016

 

Despite its conceptual simplicity, modern DRAM is actually incredibly complicated, with almost every detail a trade secret. So asking manufacturers to produce a special low latency DRAM product would incur significant up-front costs.

Given that the value is expected to be very high, a temporary product in which the far rows of an existing DDR4 chip are disabled, with timings based on access to the near rows is proposed.

DRAM_bank2

No joke! Yes, this would double the cost per Gb.

 

Earlier versions of articles replaced by above.
  The Case for Single Processor (unfinished) see: Multi-Processors Must Die

  Low Latency Memory (2018-03)  Memory Latency (2018-02)  SRAM as Main Memory (2018-02)

  Rethink Server Sizing 2017 (2017-Dec)    SRAM as Main Memory (2017-Dec)

  Rethinking System Architecture (2017-Jan),   Memory Latency, NUMA and HT (2016-Dec),

  The Case for Single Socket (2016-04)

 

Posted on Linkedin, (but needs to be updated):
  SRAM as Main Memory Cost Benefit   Rethink Server Sizing 2017

 

System Architecture

System Architecture has been split into multiple sections:
  HistoricalAMD OpteronIntel QPIDell PowerEdgeHP ProLiantIBM x Series

  NUMA (never finished),   Sandy Bridge,   KnightsLanding 2016-08,

  Asymmetric Processor Cores

 

Older Server System material

 NEC Express5800/A1080a (2010-06),  Server Sizing (Interim) (2010-08),
 Big Iron Revival III (2010-09),  Big Iron Revival II (2009-09),  Big Iron Revival (2009-05),
 Intel Xeon 5600 and 7500 series (2010-04, this material has been updated in the new links above)

 Historical Systems (incomplete)

 

Other System Architecture Articles

New Items 2016-12   Memory-IO Performance (in progress),   Memory Latency, NUMA and HT 2016-12,  The Case for Single Socket (2016-04)

Additional related topics:   Amdahl Revisited 2015-05,

  Server Strategy Shift with Sandy Bridge (formerly part of Systems Architecture 2011Q3),

  Systems Architecture 2012Q4,   2011Q3,   2010Q3,   2009,
  NEC Express5800/A1080a (2010-06),

  High Call Volume SQL on NUMA (pre-SQL 2005?),

  Big Iron Revival III (2010-09). Big Iron Revival II (2009-09), Big Iron Revival (2009-05),
  Intel Microarchitecture Diagrams

I will try to sort out the material and redistribute over several articles as appropriate. For now
  Knights Landing 2016-08,   Memory-IO Performance (),   Memory Latency, NUMA and HT 2016-12,    The Case for Single Socket (2016-04)   Amdahl Revisited   and also   Cost-Based Optimizer

 

Reference

Onur Mutlu, Professor of Computer Science at ETH Zurich website, lecture-videos

Mark Clark, AMD A New X86 Core ... ,  AMD Memory Technology